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IC Packaging Engineer
Category: Publishing , Computing
  • Your pay will be discussed at your interview

Job code: lhw-e0-75046569

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  Job posted:   Wed Jul 19, 2017
  Distance to work:   ? miles
  21 Views, 0 Applications  
IC Packaging Engineer

# IC Packaging Engineer

Job Number: 86438464

Santa Clara Valley, California, United States

Posted: Jul. 17, 2017

Weekly Hours: 40.00

**Job Summary**

You will be responsible for IC packaging development and new product introduction. We are looking for individuals who are very innovative, with a proven track record in a high volume manufacturing environment.

**Key Qualifications**

* 5+ years of experience in Semiconductor Packaging Design, Process & Technology Development

* Good understanding of cross-functional packaging areas: Si floor plan, package layout and architecture, enabling process technologies, thermal, mechanical, SI/PI, material, component & system level reliability, testing, and FA

* Expert in advanced packaging technologies: Knowledge and insight to deliver high density / high performance interconnects in various form factor, thermo-mechanical, reliability, and cost constraints

* Cross-functional coverage on package layout (Cadence APD/Allegro), critical signal integrity / power integrity, thermal, design rules, BOM, design for manufacturing, reliability, and cost

* Ability to work independently and take on projects with minimum supervision

* Excellent engineering problem solving skills with strong engineering physics


o Work with cross-functional teams and lead package integration and architecture efforts

o Work with 3rd party and OSAT to bring packaging solution from concept to HVM

o Drive industry with advanced package solutions and specs

o ~10% International travel


o BS or MS Electrical Engineering, Mechanical Engineering, Materials Science or Physics required and relevant experience within technical discipline. MS or PhD preferred.

**Additional Requirements**

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